Logic Design for Array-Based Circuitsby Donnamaie E. WhiteCopyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White, WhitePubs Enterprises, Inc. |
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
Timing Analysis for ArraysLast Edit July 22, 2001 k-FactorsThe k-factor for an internal macro output pin is the drive factor expressed in ns/LU (Load Units) that is used to convert the total net load units into time. As detailed above, load units are attributed to electrical fan-in loading, physical metal length loading and electrical wire-OR loading. Within an array series, the k-Factors vary by macro option and by edge direction. Examples are shown in Table 5-3 for the Q5000 Series (bipolar) and the Q20000 Series (high-speed bipolar) arrays. Table 5-3a Example K-Factors - Option Specific *
* Q5000 Library, internal macros, typical values Table 5-3b Example Com5max Library K-Factors For The AMCC Q20000 Series
** Individual macro k-factors are specified in the macro library documentation in the AMCC Q20000 Design Manual, Volume I, Section 6. Units are min/max spread for the Commercial 5V library only. |
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White , WhitePubs
Enterprises, Inc. |