Logic Design for Array-Based Circuits

Copyright © 1996, 2001, 2002 Donnamaie E. White

• Table of Contents
  
• Preface
  
• Overview
  
• Chapter 1 Introduction
  
• Chapter 2 Structured Design Methodology
• Chapter 3 Sizing the Design
• Chapter 3 Appendix = Case Study in Sizing a Design
• Chapter 4 Design Optimization
• Chapter 5 Timing Analysis for Arrays
• Chapter 6 External Set-up and Hold Times
• Chapter 7 Power Considerations
  • Introduction
  • Cell Types Define the Power Computation
  • DC Power in a Bipolar Array
  • DCPower in a BiCOMS Array
  • Overhead Current
  • DC Power in a CMOS Array
  • TTL Outputs - CMOS Arrays
  • ECL Static Output Power - All Arrays
  • AC Power
  • Worst-Case Power
  • Adjustment Multiplier for DC Power
  • Checking with the Vendor
  • Power Reduction Techniques
  • The Macros and Their Options
  • Macro Option Examples
  • Design Rules for Macro Options
  • Power-Down and Conditional Geometry - Bipolar
  • Terminated Outputs - Bipolar
  • Terminated Outputs - BiCMOS, CMOS
  • Inverted Outputs for Distotion Management
  • Design Rules for Power Reduction (AMCC)
  • Unused Inputs - Bipolar, BiCMOS
  • MSI and High-Functionality Macros
  • State Dependent Current - Bipolar
  • Computing DC Power Dissipation
  • Steps to Compute Maximum Worst-Case DC Power
  • Reduction for Single-Supply Circuits
  • CMOS and BiCMOS Arrays
  • Design Rules when Power is to be estimated
  • AC Macro Power Dissipation
• Case Study: DC Power Computation
• Case Study: AC Power Computation
• Chapter 8 Simulation
• Case Study: Simulation
• Chapter 9 Faults and Fault Detection
• Chapter 10 Design Submission
• ASIC Glossary
  • Glossary A-D
  • Glossary E-K
  • Glossary L-R
  • Glossary S-Z
  • Symbols

Power Considerations

Last Edit July 22, 2001

The Macros and Their Options

For the bipolar arrays and for the interface portion of the BiCMOS arrays, macro selection plays a major role in the final power dissipated by the circuit.

Macros that are fast, have high fan-out drive capability or are dense (read chip-efficient) are high-current macros. The macro library should be reviewed for the existence of options or versions. A macro library may have low-power versions or options of its macros. (Note: AMCC CMOS macros have no options.)

Once the design is blocked and the macros selected, the timing requirements should be reviewed and the macros adjusted by option when options are available and can be applied.

As discussed during the chapter on timing, low-power macros are slower than the standard or high-speed options. Low-power macros may have a lower fan-out load limit. Low-power macros may have a lower maximum frequency of operation and narrower minimum pulse width. None of these variations are absolute, i.e., they vary with the array.

Macro Option Examples

The AMCC Q5000 Bipolar Series macro library has options for most of its internal macros and many of its interface macros.

• The low-power L-option macros have a lower drive (4 versus 9 loads) and are slower than the standard S-option macros they can replace.
• High-speed H-option macros have the same drive as the S-option macros but are faster and use more current.
• Driver macros (macros with a high fan-out limit) have no options.
• The super-driver macros (with a 25 load limit) average approximately 5 mA of worst-case current versus the 2.5 mA average current of the 15-load driver macros.

The AMCC Q20000 Bipolar Series macro library also contains L-, S-, and H- options. In this series, all options have the same fan-out load limit, a function of the Turbo output feature. What is different is that some H-options use more cells than the L-and S-options. All other considerations of differences between the options remain the same.

Design Rules for Macro Options

• Always review a library to determine:
  • if it has options or versions of its macros,
  • which macros do and don't have options or versions,
  • what macros are similar with minor variants to other macros, and
  • the different limitations on the applicability of the options, versions and variants.
• During design and when available, H-option macros, high fan-out drivers and other high-current macros should be used judiciously to avoid unnecessary high current - high power dissipation.
• The use of L-option macros when available can help balance the use of high-current macros providing speed - power programmability if and only if the minimum pulse widths are not violated.
• Select macro options and versions carefully! Double-check time and power impacts of your choices.

Power-Down and Conditional Geometry - Bipolar

If a bipolar macro library is implemented with conditional geometry, macro outputs that are not used (are terminated) have their I_OEF current sources shut-down. Only one version of the macro needs to be supplied in these libraries. Note that not all macros in the library allow this feature.

Terminated Outputs - Bipolar

When power-down is not allowed, the macros in the bipolar library may be available in different versions. For example three macros may perform the same function with one supplying a non-inverted Y output, one supplying an inverted YN output and one supplying both Y and YN. The macro version selected should reflect output usage.

One or two macros that are not a perfect match may not be a problem in the design but dozens of terminated yet powered-up outputs can be expensive because of the power supply and packaging options required by the higher-than-necessary power.

Terminated Outputs - BiCMOS, CMOS

Inverted Outputs for Distortion Management

The need for signal inversion in high-speed paths for skew and pulse distortion control may require YN (inverted output). However, there may be a different speed associated with each of the output polarities. One design objective is to maintain the timing considerations of both speed and distortion management while managing power.

Power considerations require that macros exist in a library in different versions to allow the flexibility of inversion with no additional cost in power.

Examples

• The AMCC Q5000 Series macros feature power down for over 90% of the macros.
• The AMCC Q14000 and Q24000 BiCMOS Series interface macros were not implemented with conditional geometry.
• The AMCC Q20000 Series macros have no conditional geometry due to use of a completely different process and technology.
• The BiCMOS and high-speed bipolar libraries supply different versions of various macros to allow for optimum selection.

Copyright @ 2001, 2002 Donnamaie E. White, White Enterprises
For problems or questions on these pages, contact donnamaie@sbcglobal.net