Logic Design for Array-Based Circuits

Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White, WhitePubs Enterprises, Inc.

• Table of Contents
  
• Preface
  
• Overview
  
• Chapter 1 Introduction
  
• Chapter 2 Structured Design Methodology
• Chapter 3 Sizing the Design
• Chapter 3 Appendix = Case Study in Sizing a Design
• Chapter 4 Design Optimization
• Chapter 5 Timing Analysis for Arrays
• Chapter 6 External Set-up and Hold Times
• Chapter 7 Power Considerations
• Case Study: DC Power Computation
• Case Study: AC Power Computation
• Chapter 8 Simulation
• Case Study: Simulation
• Chapter 9 Faults and Fault Detection
• Chapter 10 Design Submission
  • Case Study: AMCC Design Submisison (1990)
  • Submission List Continued
  • Submission List Continued
  • Functional Simulation Submission (Required)
  • At-Speed Simulation Submiussion (Required)
  • AC Tests Path Delay Vector Submission (Optional)
  • Parametric Vectors (Required or Optional)
  • AMCC Simulation Forms - Vocabulary
• ASIC Glossary
  • Glossary A-D
  • Glossary E-K
  • Glossary L-R
  • Glossary S-Z
  • Symbols

Design Submission

Last Edit September 2, 2001

AC Tests Path Delay Vector Submission (Optional)

AC Testing is an automated testing methodology used to examine in close detail circuit performance measurements of propagation path delay. A separate set of vectors is required for each measurement, and each set must initialize and bias the path and provide the means by which the measurement can be made.

If this testing option is desired, then these vectors must be supplied. They are in addition to functional simulation vectors.

A maximum of 10 paths and 20 tests can be tested per array. Refer to the "Vector Submission Rules and Guidelines" concerning a concatenated set of vectors or the use of one set of vectors for multiple, individual tests.

AMCC requires that AC Test simulations be performed using the minimum library and then again using the maximum worst-case library. Refer to Volume I, Section 3 for the specific series to determine which library is maximum and which minimum for the array.

The minimum simulation should exactly match the maximum simulation. If not, a potential timing problem could exist. Resolve the problem or consult with AMCC and send in both the minimum and maximum AC Test simulations.

The AC Test simulations should be performed following the procedures described in the design manual.

Documentation of AC Test Simulation [AMCCSUBMIT]

The documentation required for an AC Test simulation submission is prompted for by the AMCCSUBMIT program interface. Before running AMCCSUBMIT, simulation files for the paths, both in sampled and in print-on-change format should exist. The program is iterative, allowing test to be documented one at a time or a test to be partially documented in one run and completed in another. All AMCCSUBMIT errors should be resolved prior to submission.

Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White , WhitePubs Enterprises, Inc.
For problems or questions on these pages, contact [email protected]