Logic Design for Array-Based Circuits - D. E. White - eBook


Logic Design for Array-Based Circuits by Donnamaie E. White Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White, WhitePubs Enterprises, Inc.

Table of Contents Preface Overview Chapter 1 Introduction Chapter 2 Structured Design Methodology Chapter 3 Sizing the Design Chapter 3 Appendix = Case Study in Sizing a Design Chapter 4 Design Optimization Chapter 5 Timing Analysis for Arrays Chapter 6 External Set-up and Hold Times Chapter 7 Power Considerations Case Study: DC Power Computation Case Study: AC Power Computation Chapter 8 Simulation Case Study: Simulation Chapter 9 Faults and Fault Detection Chapter 10 Design Submission Case Study: AMCC Design Submisison (1990) Submission List Continued Submission List Continued Functional Simulation Submission (Required) At-Speed Simulation Submiussion (Required) AC Tests Path Delay Vector Submission (Optional) Parametric Vectors (Required or Optional) AMCC Simulation Forms - Vocabulary ASIC Glossary Glossary A-D Glossary E-K Glossary L-R Glossary S-Z Symbols	Design Submission Last Edit September 2, 2001 Functional Simulation Submission (Required) The functional simulation output vectors, consisting of all of the input and the expected output signals generated by the input stimulus file, are the actual vectors used by the AMCC test department to verify the correct functional operation of the part. The customer must supply all functional simulation vectors. AMCC uses functional simulation output vectors for fault grading and recommends 90% or better fault coverage of the final circuit. AMCC requires that functional simulations be performed once using the minimum library and once using the maximum worst-case library. Refer to Volume I, Section 3 for the specific series to determine which library is maximum and which minimum for the array. The minimum simulation should exactly match the maximum simulation. If not, a potential timing problem could exist. Resolve the problem or consult with AMCC and send in both the minimum and maximum functional simulations. The functional simulation should be performed following the procedures described in the design manual. Functional Simulation Documentation The documentation required for an AC Test simulation submission is prompted for by the AMCCSUBMIT program interface. Before running AMCCSUBMIT, simulation files for the paths in sampled format should exist. All AMCCSUBMIT errors should be resolved prior to submission. Documentation included on disk or tape for each functional simulation file includes: the sampled AMCCSIMFMT file name (file is UNEDITED); whether this was a MIN or a MAX simulation; PRODUCT_GRADE is prompted in the form header (identifies the annotation file used); the simulation control file name; the simulation input file name, if any; the simulation command file name which may be submit procedures, a transcript of system operation during simulation, including VIEW, RUN, START, LIST, WRITE, etc. statements as required for the specific system; the AMCCVRC.LST report file name (rename since several are included per submission); the signal analysis file used with AMCCVRC; the name of the text file version of the data or the control file which clearly describes the testing performed; the timing check report for the file (all simulations done for submission use timing checks active). the AMCCVRC.LST report commented for errors AMCC waivers.
Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White , WhitePubs Enterprises, Inc. For problems or questions on these pages, contact donnamaie@-no-spam-sbcglobal.net