Logic Design for Array-Based Circuits

Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White, WhitePubs Enterprises, Inc.

• Table of Contents
  
• Preface
  
• Overview
  
• Chapter 1 Introduction
  
• Chapter 2 Structured Design Methodology
• Chapter 3 Sizing the Design
• Chapter 3 Appendix = Case Study in Sizing a Design
• Chapter 4 Design Optimization
• Chapter 5 Timing Analysis for Arrays
• Chapter 6 External Set-up and Hold Times
  • Introduction
  • Case 1: When the Timing Specifications Are Nominal
  • Case 2: When The Timing Specifications Are Worst-Case
  • Example - AMCC Q1400 BiCMOS Series
  • Example - AMCC Q20000 Bipolar Series
  • External Hold Time (MIL5, COM5)
  • Converting COM5 to COM4, MIL5 to MIL4
• Case Study: Preventing Hold Violations Due To Clock Skew
  • Hold Time Considerations
  • Overcoming Hold Time Error
  • Design Check
• Computing Hold Time in the Register Example
• Minimum Library (Q5000 Series)
• Military Library (Q5000 Series)
• Exercises
• Chapter 7 Power Considerations
• Case Study: DC Power Computation
• Case Study: AC Power Computation
• Chapter 8 Simulation
• Case Study: Simulation
• Chapter 9 Faults and Fault Detection
• Chapter 10 Design Submission
• ASIC Glossary
  • Glossary A-D
  • Glossary E-K
  • Glossary L-R
  • Glossary S-Z
  • Symbols

External Set-Up and Hold Times

Last Edit July 22, 2001

Case 2: When The Timing Specifications Are Worst-Case

For the case where the vendor has specified timing delays as worst-case, the following procedures can be applied. Note that if the macro intrinsic delays are specified as worst-case maximum, some means of computing the worst-case minimum for the same operating conditions must exist.

Set-Up Time - Generic Equation

When computing the set-up time, it is desirable to assume that the data propagation path delay is the worst-case maximum and that the clock path propagation delay is a worst-case minimum for the operating conditions. The generic equation is:

Hold Time - Generic Equation

When computing the hold time, it is desirable to assume that the data propagation path delay is the worst-case minimum and that the clock path propagation delay is a worst-case maximum for the operating conditions.

The generic equation is:

Example - The AMCC BiCMOS Q14000 Series

The Q14000 Series has a complex arrangement of worst-case multipliers, separating interface and internal and differentiating between the channelled and channel-less arrays. For the Q14000 BiCMOS arrays, the data and clock paths are broken down into the interface macro and its net (t_Dinput or t_Cinput), and the internal macros and the nets they drive (t_D or t_C). Both set-up and hold times are specified as nominal for this array.

For the Q14000 Series and its dual multipliers, the external set-up and hold time equations become:

Table 6-1 General Equations When Worst-Case Multipliers Are Used

Table 6-2 provides the external set-up and hold equations for the Q14000 BiCMOS Series Arrays for four defined operating conditions, MIL, COM5, COM4 and MIN, using the specified worst-case delay multipliers specified for the array series for those conditions.

Note that, since these arrays specify nominal macro intrinsic set-up and hold times, the worst-case time delay multipliers are applied to the set-up and hold times as well as to the Tpd delays. This may not always be the case. (Refer to the AMCC Q5000 and Q14000 Design Manuals.)

Table 6-2 Set-Up And Hold Equations BiCMOS Q14000 Series Arrays Q28000B, Q14000B, Q6000B And Q800B Arrays

These equations are for the channelless arrays, those designed with a sea-of-gates or sea-of-cells architecture. (Refer to the AMCC Q14000 Design Manual for the equations for the other arrays in the series that are channelled.)

Which Equations Should be Used?

For external set-up time, use the following as a guideline:

• Use the MILITARY or COMMERCIAL equations for external set-up time when
  ( t_D + t_Dinput) - 0.82 * (t_C + t_Cinput) > 0.

• Use the MINIMUM equations for external set-up time when
  (t_D + t_Dinput) - 0.82 * (t_C + t_Cinput) < 0.

For external hold time, use the following as a guideline:

• Use the MILITARY or COMMERCIAL equations for external hold time when
  (t_C + t_Cinput) - 0.82 * (t_D + t_Dinput) > 0.

• Use the MINIMUM equations for external hold time when
  (t_C + t_Cinput) - 0.82 * (t_D + t_Dinput) < 0.

.

Copyright © 1996, 2001, 2002, 2008, 2016 Donnamaie E. White , WhitePubs Enterprises, Inc.
For problems or questions on these pages, contact [email protected]