Bit-Slice Design: Controllers and ALUs
by Donnamaie E. White
Copyright © 1996, 2001, 2002, 2008 Donnamaie E. White
- Pre-Introduction
- Selection of the Implementation
- Microprogramming
- Advantages of LSI
- The 2900 Family
- Language Interrelationships
- Controller Design
- Constructing the CCU
- Sequential Execution
- Multiple Sequences
- Start Addresses
- Mapping PROM
- Unconditional Branch
- Conditional Branch
- Timing Considerations
- Pipelining
- Improved Architecture
3. Adding Programming Support to the Controller
- Expanded Testing
- Subroutines
- Nested Subroutines
- Stack Size
- Loops
- Am29811
- Am2909/11
- CASE Statement (Am29803A)
- Microprogram Memory
- Status Polling
- Interrupt Servicing
- Implementation - Interrupt Request Signals
- Vector Mapping PROM
- Next Address Control
- Am2910
- Am2910 Instructions
- JZ, CONT, JMAP
- CJP, CJV, LDCT, JRP, CJS
- JSRP, CRTN, RPCT, PUSH
- LOOP, CJPP, TWB
- Control Lines
- Interrupt Handling
- Am2914
- Interconnection of the Am2914
6. The ALU and Basic Arithmetic
- Further Enhancements
- Instruction Fields
- Instruction Set Extensions
- Sample Operations
- Arithmetic -- General
- Multiplication with the Am2901
- Am2903 Multiply
Refining the CCULast Edit November 2, 1996; May 1, 1999; July 7, 2001 Am2914The Am2914 (see Figure 4-29) incorporates all of these desired features. It contains
Figure 4-29 Am2914 block diagram
The instruction set for the Am2914 is shown in Table 4-2, and a program flow is shown in Figure 4-30 which diagrams where, within a microprogram structure, the various Am2914 instructions could appear. Table 4-2 Am2914 Instruction Set
Figure 4-30 Sample usage of Am2914 instructions (flow)
|
